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FER

Project information

FER (FPGA Empirical Roofline) is a benchmarking tool to empirically estimate the Roofline of an FPGA

FPGA Benchmark Roofline

21 Commits
2 Branches
1 Tag

README
GNU General Public License v3.0 or later

Created on

September 28, 2020

Copy SSH clone URLgit@baltig.infn.it:EuroEXA/FER.git
Copy HTTPS clone URLhttps://baltig.infn.it/EuroEXA/FER.git

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